6024e5c395
clang 20.0.0 (based on r547379) from build 12806354. Bug: http://b/379133546 Test: N/A Change-Id: I2eb8938af55d809de674be63cb30cf27e801862b Upstream-Commit: ad834e67b1105d15ef907f6255d4c96e8e733f57
392 lines
17 KiB
TableGen
392 lines
17 KiB
TableGen
//===- IntrinsicsWebAssembly.td - Defines wasm intrinsics --*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file defines all of the WebAssembly-specific intrinsics.
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///
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//===----------------------------------------------------------------------===//
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// Type definition for a table in an intrinsic
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def llvm_table_ty : LLVMQualPointerType<1>;
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let TargetPrefix = "wasm" in { // All intrinsics start with "llvm.wasm.".
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// Query the current memory size, and increase the current memory size.
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// Note that memory.size is not IntrNoMem because it must be sequenced with
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// respect to memory.grow calls.
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def int_wasm_memory_size :
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DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty], [IntrReadMem]>;
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def int_wasm_memory_grow :
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DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty, LLVMMatchType<0>], []>;
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//===----------------------------------------------------------------------===//
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// ref.null intrinsics
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//===----------------------------------------------------------------------===//
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def int_wasm_ref_null_extern :
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DefaultAttrsIntrinsic<[llvm_externref_ty], [], [IntrNoMem]>;
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def int_wasm_ref_null_func :
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DefaultAttrsIntrinsic<[llvm_funcref_ty], [], [IntrNoMem]>;
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def int_wasm_ref_null_exn:
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DefaultAttrsIntrinsic<[llvm_exnref_ty], [], [IntrNoMem]>;
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def int_wasm_ref_is_null_extern :
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DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_externref_ty], [IntrNoMem],
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"llvm.wasm.ref.is_null.extern">;
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def int_wasm_ref_is_null_func :
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DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_funcref_ty],
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[IntrNoMem], "llvm.wasm.ref.is_null.func">;
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def int_wasm_ref_is_null_exn :
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DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_exnref_ty], [IntrNoMem],
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"llvm.wasm.ref.is_null.exn">;
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//===----------------------------------------------------------------------===//
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// Table intrinsics
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//===----------------------------------------------------------------------===//
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def int_wasm_table_set_externref :
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DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_externref_ty],
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[IntrWriteMem]>;
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def int_wasm_table_set_funcref :
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DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty],
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[IntrWriteMem]>;
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def int_wasm_table_set_exnref :
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DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_exnref_ty],
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[IntrWriteMem]>;
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def int_wasm_table_get_externref :
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DefaultAttrsIntrinsic<[llvm_externref_ty], [llvm_table_ty, llvm_i32_ty],
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[IntrReadMem]>;
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def int_wasm_table_get_funcref :
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DefaultAttrsIntrinsic<[llvm_funcref_ty], [llvm_table_ty, llvm_i32_ty],
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[IntrReadMem]>;
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def int_wasm_table_get_exnref :
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DefaultAttrsIntrinsic<[llvm_exnref_ty], [llvm_table_ty, llvm_i32_ty],
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[IntrReadMem]>;
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// Query the current table size, and increase the current table size.
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def int_wasm_table_size :
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DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_table_ty], [IntrReadMem]>;
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def int_wasm_table_copy :
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DefaultAttrsIntrinsic<[],
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[llvm_table_ty, llvm_table_ty, llvm_i32_ty, llvm_i32_ty,
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llvm_i32_ty], []>;
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def int_wasm_table_grow_externref :
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DefaultAttrsIntrinsic<[llvm_i32_ty],
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[llvm_table_ty, llvm_externref_ty, llvm_i32_ty], []>;
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def int_wasm_table_grow_funcref :
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DefaultAttrsIntrinsic<[llvm_i32_ty],
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[llvm_table_ty, llvm_funcref_ty, llvm_i32_ty], []>;
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def int_wasm_table_grow_exnref :
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DefaultAttrsIntrinsic<[llvm_i32_ty],
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[llvm_table_ty, llvm_exnref_ty, llvm_i32_ty], []>;
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def int_wasm_table_fill_externref :
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DefaultAttrsIntrinsic<[],
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[llvm_table_ty, llvm_i32_ty, llvm_externref_ty,
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llvm_i32_ty], []>;
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def int_wasm_table_fill_funcref :
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DefaultAttrsIntrinsic<[],
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[llvm_table_ty, llvm_i32_ty, llvm_funcref_ty,
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llvm_i32_ty], []>;
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def int_wasm_table_fill_exnref :
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DefaultAttrsIntrinsic<[],
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[llvm_table_ty, llvm_i32_ty, llvm_exnref_ty,
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llvm_i32_ty], []>;
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//===----------------------------------------------------------------------===//
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// Trapping float-to-int conversions
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//===----------------------------------------------------------------------===//
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// These don't use default attributes, because they are not willreturn.
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def int_wasm_trunc_signed : Intrinsic<[llvm_anyint_ty],
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[llvm_anyfloat_ty],
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[IntrNoMem]>;
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def int_wasm_trunc_unsigned : Intrinsic<[llvm_anyint_ty],
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[llvm_anyfloat_ty],
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[IntrNoMem]>;
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//===----------------------------------------------------------------------===//
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// Saturating float-to-int conversions
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//===----------------------------------------------------------------------===//
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def int_wasm_trunc_saturate_signed :
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DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_trunc_saturate_unsigned :
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DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
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[IntrNoMem, IntrSpeculatable]>;
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//===----------------------------------------------------------------------===//
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// Exception handling intrinsics
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//===----------------------------------------------------------------------===//
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// throw / rethrow
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// The first immediate argument is an index to a tag, which is 0 for C++
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// exception. The second argument is the thrown exception pointer.
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def int_wasm_throw : Intrinsic<[], [llvm_i32_ty, llvm_ptr_ty],
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[Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>;
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def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>;
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// Since wasm does not use landingpad instructions, these instructions return
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// exception pointer and selector values until we lower them in WasmEHPrepare.
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def int_wasm_get_exception :
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DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_token_ty], [IntrHasSideEffects]>;
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def int_wasm_get_ehselector :
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DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_token_ty], [IntrHasSideEffects]>;
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// wasm.catch returns the pointer to the exception object caught by wasm 'catch'
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// instruction. This returns a single pointer, which is the case for C++
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// exceptions. The immediate argument is an index to for a tag, which is 0 for
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// C++ exceptions.
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def int_wasm_catch :
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DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_i32_ty],
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[IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
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// WebAssembly EH must maintain the landingpads in the order assigned to them
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// by WasmEHPrepare pass to generate landingpad table in EHStreamer. This is
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// used in order to give them the indices in WasmEHPrepare.
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def int_wasm_landingpad_index :
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DefaultAttrsIntrinsic<[], [llvm_token_ty, llvm_i32_ty],
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[IntrNoMem, ImmArg<ArgIndex<1>>]>;
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// Returns LSDA address of the current function.
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def int_wasm_lsda : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
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//===----------------------------------------------------------------------===//
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// Atomic intrinsics
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//===----------------------------------------------------------------------===//
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// wait / notify
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// These don't use default attributes, because they are not nosync.
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def int_wasm_memory_atomic_wait32 :
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Intrinsic<[llvm_i32_ty],
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[llvm_ptr_ty, llvm_i32_ty, llvm_i64_ty],
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[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
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NoCapture<ArgIndex<0>>, IntrHasSideEffects],
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"", [SDNPMemOperand]>;
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def int_wasm_memory_atomic_wait64 :
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Intrinsic<[llvm_i32_ty],
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[llvm_ptr_ty, llvm_i64_ty, llvm_i64_ty],
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[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
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NoCapture<ArgIndex<0>>, IntrHasSideEffects],
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"", [SDNPMemOperand]>;
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def int_wasm_memory_atomic_notify:
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Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
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[IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
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IntrHasSideEffects],
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"", [SDNPMemOperand]>;
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//===----------------------------------------------------------------------===//
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// SIMD intrinsics
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//===----------------------------------------------------------------------===//
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def int_wasm_swizzle :
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DefaultAttrsIntrinsic<[llvm_v16i8_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_shuffle :
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DefaultAttrsIntrinsic<[llvm_v16i8_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
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llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
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llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
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llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
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[IntrNoMem, IntrSpeculatable,
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ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
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ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
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ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>,
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ImmArg<ArgIndex<8>>, ImmArg<ArgIndex<9>>,
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ImmArg<ArgIndex<10>>, ImmArg<ArgIndex<11>>,
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ImmArg<ArgIndex<12>>, ImmArg<ArgIndex<13>>,
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ImmArg<ArgIndex<14>>, ImmArg<ArgIndex<15>>,
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ImmArg<ArgIndex<16>>, ImmArg<ArgIndex<17>>]>;
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def int_wasm_sub_sat_signed :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_sub_sat_unsigned :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_avgr_unsigned :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_bitselect :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_anytrue :
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DefaultAttrsIntrinsic<[llvm_i32_ty],
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[llvm_anyvector_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_alltrue :
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DefaultAttrsIntrinsic<[llvm_i32_ty],
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[llvm_anyvector_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_bitmask :
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DefaultAttrsIntrinsic<[llvm_i32_ty],
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[llvm_anyvector_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_dot :
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DefaultAttrsIntrinsic<[llvm_v4i32_ty],
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[llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_narrow_signed :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[llvm_anyvector_ty, LLVMMatchType<1>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_narrow_unsigned :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[llvm_anyvector_ty, LLVMMatchType<1>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_q15mulr_sat_signed :
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DefaultAttrsIntrinsic<[llvm_v8i16_ty],
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[llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_pmin :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_pmax :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_extadd_pairwise_signed :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMSubdivide2VectorType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_extadd_pairwise_unsigned :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMSubdivide2VectorType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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//===----------------------------------------------------------------------===//
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// Relaxed SIMD intrinsics (experimental)
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//===----------------------------------------------------------------------===//
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def int_wasm_relaxed_madd :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_nmadd :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_laneselect :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_swizzle :
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DefaultAttrsIntrinsic<[llvm_v16i8_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_min :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_max :
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DefaultAttrsIntrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_trunc_signed:
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DefaultAttrsIntrinsic<[llvm_v4i32_ty],
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[llvm_v4f32_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_trunc_unsigned:
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DefaultAttrsIntrinsic<[llvm_v4i32_ty],
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[llvm_v4f32_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_trunc_signed_zero:
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DefaultAttrsIntrinsic<[llvm_v4i32_ty],
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[llvm_v2f64_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_trunc_unsigned_zero:
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DefaultAttrsIntrinsic<[llvm_v4i32_ty],
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[llvm_v2f64_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_q15mulr_signed:
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DefaultAttrsIntrinsic<[llvm_v8i16_ty],
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[llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_dot_i8x16_i7x16_signed:
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DefaultAttrsIntrinsic<[llvm_v8i16_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_dot_i8x16_i7x16_add_signed:
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DefaultAttrsIntrinsic<[llvm_v4i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_dot_bf16x8_add_f32:
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DefaultAttrsIntrinsic<[llvm_v4f32_ty],
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[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty],
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[IntrNoMem, IntrSpeculatable]>;
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//===----------------------------------------------------------------------===//
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// Half-precision intrinsics (experimental)
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//===----------------------------------------------------------------------===//
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// TODO: Replace these intrinsic with normal ISel patterns once the XXX
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// instructions are merged to the proposal.
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def int_wasm_loadf16_f32:
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DefaultAttrsIntrinsic<[llvm_float_ty],
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[llvm_ptr_ty],
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[IntrReadMem, IntrArgMemOnly],
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"", [SDNPMemOperand]>;
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def int_wasm_storef16_f32:
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Intrinsic<[],
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[llvm_float_ty, llvm_ptr_ty],
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[IntrWriteMem, IntrArgMemOnly],
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"", [SDNPMemOperand]>;
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def int_wasm_splat_f16x8:
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DefaultAttrsIntrinsic<[llvm_v8f16_ty],
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[llvm_float_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_extract_lane_f16x8:
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DefaultAttrsIntrinsic<[llvm_float_ty],
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[llvm_v8f16_ty, llvm_i32_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_replace_lane_f16x8:
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DefaultAttrsIntrinsic<[llvm_v8f16_ty],
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[llvm_v8f16_ty, llvm_i32_ty, llvm_float_ty],
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[IntrNoMem, IntrSpeculatable]>;
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//===----------------------------------------------------------------------===//
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// Thread-local storage intrinsics
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//===----------------------------------------------------------------------===//
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def int_wasm_tls_size :
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DefaultAttrsIntrinsic<[llvm_anyint_ty],
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[],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_tls_align :
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DefaultAttrsIntrinsic<[llvm_anyint_ty],
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[],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_tls_base :
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DefaultAttrsIntrinsic<[llvm_ptr_ty],
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[],
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[IntrReadMem]>;
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} // TargetPrefix = "wasm"
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