6024e5c395
clang 20.0.0 (based on r547379) from build 12806354. Bug: http://b/379133546 Test: N/A Change-Id: I2eb8938af55d809de674be63cb30cf27e801862b Upstream-Commit: ad834e67b1105d15ef907f6255d4c96e8e733f57
43 lines
1.5 KiB
C++
43 lines
1.5 KiB
C++
//===- llvm/CodeGen/GlobalISel/InstructionSelector.h ------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file declares the API for the instruction selector.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
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#define LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
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#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h"
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namespace llvm {
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class InstructionSelector : public GIMatchTableExecutor {
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public:
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virtual ~InstructionSelector();
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/// Select the (possibly generic) instruction \p I to only use target-specific
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/// opcodes. It is OK to insert multiple instructions, but they cannot be
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/// generic pre-isel instructions.
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///
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/// \returns whether selection succeeded.
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/// \pre I.getParent() && I.getParent()->getParent()
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/// \post
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/// if returns true:
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/// for I in all mutated/inserted instructions:
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/// !isPreISelGenericOpcode(I.getOpcode())
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virtual bool select(MachineInstr &I) = 0;
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// FIXME: Eliminate dependency on TargetPassConfig for NewPM transition
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const TargetPassConfig *TPC = nullptr;
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MachineOptimizationRemarkEmitter *MORE = nullptr;
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};
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} // namespace llvm
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#endif
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